1. Field of the Invention
This invention relates to ordered high speed digital registers, and more particularly relates to a parallel sampling technique, for an ordered register of the analog-to-digital converter type, in which the phase pattern of sampling is a function of the bit values of the respectively preceding bit order positions, so as to sample each bit at a valid phase, a phase least affected by the hash of transient noise.
2. Description of Related Art
Josephson junction devices, operating at liquid helium temperatures (4.2 K.) near absolute zero, are able to operate at very high speeds and also take advantage of superconductive signal transmission. Analog-to-digital converters fabricated from superconducting Josephson devices have been reported, using the multiple lobes of a threshold curve of a Josephson interferometer. Other technologies, such as optical interferometers, which also have threshold curves with multiple lobes, are capable of very high speed operation. At such high speeds, the switching transients inherent in the technology become the limiting factors; it is usual to wait until transients dissipate before sampling the switched position, since it is not usually possible to determine in advance which position is being switched. The ordered register is thus normally assigned a sampling cycle sufficient for all transients to dissipate, on a worst case basis or statistical worst case basis. As greater speeds are introduced, greater precision is the usual response to the requirement for accuracy and capability.
Ordered registers, such as accumulators, counters and analog-to-digital converters, tend to be deployed in applications which require very high speed operation. A gating factor in ordered registers may be the propagation of carry signals from low order to high order, and a great number of fast carry techniques have been developed to circumvent this problem by simulating carry signals where appropriate. Analog-to-digital coverters, however, have generally depended upon special codes and upon high speed circuitry for their operating speed. Gray codes, in which code techniques are used to minimize transient effects by requiring that a following value be expressed with only a single change of bit value, are an attempt to minimize the transient problem. There are a number of analog-to-digital techniques and mechanisms available in the literature and in the marketplace, but these tend to operate at speeds well within the tolerances demanded by switching transients likely to be incurred as a result of normal operation. At very high speeds, sampling is adversely affected by switching transients within the register.
Examples of the prior art are:
U.S. Pat. No. 3,196,427, Mann et al, SUPERCONDUCTIVE ANALOG TO DIGITAL CONVERTER, July 1965. Mann et al shows a superconductive analog-to-digital converter comprising superconductive gate elements, magnetically and non-conductively coupled and laid along a weighted inductance for limiting the current so as to select particular gates.
U.S. Pat. No. 3,949,395, Klein, SUCCESSIVE-APPROXIMATION ANALOG-TO-DIGITAL CONVERTER USING JOSEPHSON DEVICES, April 1976. Klein shows a successive approximation analog-to-digital converter using Josephson devices. Fixed bias currents control the effective thresholds of comparison devices.
U.S. Pat. No. 4,315,255, Harris et al., MULTIPLE-QUANTUM INTERFERENCE SUPERCONDUCTING ANALOG-TO-DIGITAL CONVERTER, February 1982. Harris et al shows the use of superconducting interferometers connected in parallel, each interferometer being identical. The coupling of the analog signal to each successive interferometer is increased in the ratio of 1:2:4:8:16:32, etc.
H. H. Zappe, ULTRASENSITIVE ANALOG-TO-DIGITAL CONVERTER USING JOSEPHSON JUNCTIONS, IBM Technical Disclosure Bulletin, Vol. 17, No. 10, March 1975, pp. 3053-3054. Zappe shows an analog-to-digital converter using weak-link superconductors in quantum interference devices. Devices J1, J2 and J4 provide voltage outputs V1, V2, V4 respectively according to the settings of the DC bias of the Josephson junctions J1, J2, J4.
Fang et al, ANALOG-TO-DIGITAL CONVERTER, IBM Technical Disclosure Bulletin, Vol. 17, No. 8, January 1975, pp. 2476-2478. Fang et al shows an analog-to-digital converter incorporating a different number of Josephson junctions shunting resistances so as to select individual resistances whenever the Josephson junctions associated with respective resistances all fire. For example, a first resistance is shunted by one Josephson junction; a second resistance is shunted by two Josephson junctions; a third resistance is shunted by four Josephson junctions, etc.
Saul, "A NOVEL APPROACH TO HIGH SPEED A-D CONVERSION, Electronics Industry," February 1978, Vol. 4, No. 2 pp. 25-77. Saul shows a parallel analog-to-digital converter implemented in large scale integration and shows techniques for increasing the resolution by using separate bias chains.
Leonberger et al, "4-BIT 828-MEGASAMPLE/S ELECTRO-OPTIC GUIDED-WAVE ANALOG-TO-DIGITAL CONVERTER," Appl. Phys. Letter 40 (8), Apr. 1, 1982, pp. 565-568. Leonberger et al shows how individual bit channels of a four-bit guided wave electro-optic analog-to-digital converter can operate with optical sample to provide complete isolation of the analog signal and the sampling command pulse.
Evanczuk, "A-D CONVERTER PUSHES GIGABITS," Electronics, June 16, 1982, pp. 48-50. Evanczuk comments on the Leonberger optical sampling techniques.
Hamilton et al. "DESIGN LIMITATIONS FOR SUPERCONDUCTING A/D CONVERTERS." Hamilton et al shows the principal of analog-to-digital conversion using superconducting quantum interference devices called SQUID. Taking advantage of the SQUID characteristic of periodic dependence of their switching thresholds on an input control current.